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software:freebsd:amdtemp [2022/02/04 18:42]
– removed - external edit (Unknown date) 127.0.0.1
software:freebsd:amdtemp [2022/02/05 04:08]
root
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 +====== amdtemp ======
 +Completely rewritten amdtemp driver.\\
 +There is no longer binding to the processor ID, all the new processors will be supported without the need to modify the code.\\
  
 +<note important>Unsupported, use system version.</note>
 +
 +**Download**: [[http://netlab.linkpc.net/download/software/FreeBSD/patches/amdtemp.c|amdtemp.c]] [[https://reviews.freebsd.org/D9759|D9759]]\\
 +**Licence**: BSD\\
 +
 +
 +===== Read methods =====
 +  - D18F3xE4 Thermtrip Status Register (TTS) - all registers are read-only. 
 +  - D18F3x64 Hardware Thermal Control (HTC) - everything except HtcTmpLmt available for recording.
 +  - D18F3xA4 Reported Temperature Control Register (RTC) - everything except CurTmp available for recording.
 +  - SB-TSI - Temperature Sensor Interface via CPU registers (TSI) - most writable. 
 +  - TSI via SMBus - **not implemented!**
 +**sensor_offset** - can be customized for each sensor separately.
 +
 +
 +===== Tunables =====
 +Register values ​​can be found in the documentation on the processor.\\
 +
 +==== D18F3xE4 Thermtrip Status Register ====
 +  * **TjOffset** (RD) - This field is the offset from CurTmp used to normalize to Tcontrol.
 +  * **DiodeOffset** (RD) - Thermal diode offset is used to correct the measurement made by an external temperature sensor.
 +  * **ThermtpEn** (RD) - The THERMTRIP state is supported by the processor.
 +  * **Thermtrip** (RD) - The processor has entered the THERMTRIP state.
 +
 +
 +==== D18F3x64 Hardware Thermal Control (HTC) ====
 +  * **HtcTmpLmt** (RD, Kelvin) - HTC temperature limit
 +  * **HtcHystLmt** (RW, Kelvin) - HTC hysteresis. The processor exits the HTC active state when the temperature selected by HtcSlewSel is less than the HTC temperature limit (HtcTmpLmt) minus the HTC hysteresis (HtcHystLmt).
 +  * **HtcEn** (RW) - HTC is enabled; the processor is capable of entering the HTC-active state.
 +  * **HtcLock** (RW) - HtcPstateLimit, HtcHystLmt, HtcTmpLmt, and HtcEn are read-only.
 +  * **HtcSlewSel** (RW) - HTC slew-controlled temperature select.
 +  * **HtcPstateLimit** (RW) - HTC P-state limit select.
 +  * **HtcAct** (RW) - The processor is currently in the HTC-active state.
 +  * **HtcActSts** (RW) - set-by-hardware; write-1-to-clear. Reset: 0. This bit is set by hardware when the processor enters the HTC-active state. It is cleared by writing a 1 to it.
 +  * **PslApicHiEn** (RW) - P-state limit higher value change APIC interrupt enable.
 +  * **PslApicLoEn** (RW) - P-state limit lower value change APIC interrupt enable.
 +
 +
 +==== D18F3xA4 Reported Temperature Control Register ====
 +  * **CurTmp** (RD, Kelvin) - Provides the current control temperature, Tctl, after the slew-rate controls have been applied.
 +  * **CurTmpTjSel** (RW, Kelvin) - Specifies a value used to create Tctl.
 +  * **TmpSlewDnEn** (RW) - Temperature slew downward enable.
 +  * **TmpMaxDiffUp** (RW) - Specifies the maximum difference, (Tctlm - Tctl), when Tctl immediatly updates to Tctlm.
 +  * **PerStepTimeDn** (RW) - Specifies the time that Tctlm must remain below Tctl before applying a 0.125 downward step.
 +  * **PerStepTimeUp** (RW) - Specifies the time that Tctlm must remain above Tctl before applying a 0.125 upward step.
 +
 +
 +==== SB-TSI registers ====
 +  * **cpu_temperature** (RD, Kelvin) - CPU Temperature
 +  * **high_temperature_threshold** (RD, Kelvin) - High Temperature Threshold
 +  * **low_temperature_threshold** (RD, Kelvin) - Low Temperature Threshold
 +  * **cpu_temperature_offset_hi** (RW) - CPU Temperature Offset High Byte
 +  * **cpu_temperature_offset_lo** (RW) - CPU Temperature Offset Low Byte
 +  * **status** (RW) - SB-TSI Status
 +  * **cfg3** (RW) - SB-TSI Configuration Register 0x03
 +  * **cfg9** (RW) - SB-TSI Configuration Register 0x09
 +  * **upd_rate** (RW) - Update Rate
 +  * **timeout_cfg** (RW) - Timeout Configuration
 +  * **alert_threshold** (RW) - Alert Threshold
 +  * **alert_cfg** (RW) - Alert Configuration
 +  * **manufacture_id** (RD) - Manufacture ID
 +  * **revision** (RD) - SB-TSI Revision
 +
 +
 +===== Installing =====
 +  - download
 +  - replace amdtemp.c at /usr/src/sys/dev/amdtemp/
 +  - Rebuild and install module: <code>kldunload amdtemp
 +cd /usr/src/sys/modules/amdtemp/
 +make
 +make install
 +make cleandir
 +</code>
 +
 +
 +===== Usage =====
 +Load module:
 +<code>kldload amdtemp</code>
 +
 +Auto load on system start: **/boot/loader.conf**
 +<code>amdtemp_load="YES"</code>
 +Or add **kld_list** to: **/etc/rc.conf**, example:
 +<code>kld_list="amdtemp"</code>
 +
 +Show temperature:
 +<code># sysctl dev.cpu | grep temperature
 +dev.cpu.0.temperature: 56.0C
 +dev.cpu.1.temperature: 56.0C</code>
 +
 +Show all:
 +<code># sysctl dev.amdtemp
 +dev.amdtemp.%parent: 
 +dev.amdtemp.0.%desc: AMD CPU On-Die Thermal Sensors
 +dev.amdtemp.0.%driver: amdtemp
 +dev.amdtemp.0.%location: 
 +dev.amdtemp.0.%pnpinfo: 
 +dev.amdtemp.0.%parent: hostb4
 +dev.amdtemp.0.htc.HtcTmpLmt: 100.0C
 +dev.amdtemp.0.htc.HtcHystLmt: 3.0C
 +dev.amdtemp.0.htc.HtcEn: 1
 +dev.amdtemp.0.htc.HtcLock: 0
 +dev.amdtemp.0.htc.HtcSlewSel: 0
 +dev.amdtemp.0.htc.HtcPstateLimit: 2
 +dev.amdtemp.0.htc.HtcAct: 0
 +dev.amdtemp.0.htc.HtcActSts: 0
 +dev.amdtemp.0.htc.PslApicHiEn: 0
 +dev.amdtemp.0.htc.PslApicLoEn: 0
 +dev.amdtemp.0.rtc.CurTmp: 56.0C
 +dev.amdtemp.0.rtc.CurTmpTjSel: 7.0C
 +dev.amdtemp.0.rtc.TmpSlewDnEn: 1
 +dev.amdtemp.0.rtc.TmpMaxDiffUp: 3
 +dev.amdtemp.0.rtc.PerStepTimeDn: 15
 +dev.amdtemp.0.rtc.PerStepTimeUp: 15
 +dev.amdtemp.0.rtc.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor0.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor0.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor0.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor0.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor0.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor0.status: 0
 +dev.amdtemp.0.tsi.sensor0.cfg3: 0
 +dev.amdtemp.0.tsi.sensor0.cfg9: 0
 +dev.amdtemp.0.tsi.sensor0.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor0.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor0.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor0.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor0.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor0.revision: 2
 +dev.amdtemp.0.tsi.sensor0.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor1.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor1.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor1.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor1.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor1.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor1.status: 0
 +dev.amdtemp.0.tsi.sensor1.cfg3: 0
 +dev.amdtemp.0.tsi.sensor1.cfg9: 0
 +dev.amdtemp.0.tsi.sensor1.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor1.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor1.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor1.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor1.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor1.revision: 2
 +dev.amdtemp.0.tsi.sensor1.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor2.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor2.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor2.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor2.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor2.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor2.status: 0
 +dev.amdtemp.0.tsi.sensor2.cfg3: 0
 +dev.amdtemp.0.tsi.sensor2.cfg9: 0
 +dev.amdtemp.0.tsi.sensor2.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor2.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor2.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor2.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor2.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor2.revision: 2
 +dev.amdtemp.0.tsi.sensor2.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor3.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor3.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor3.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor3.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor3.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor3.status: 0
 +dev.amdtemp.0.tsi.sensor3.cfg3: 0
 +dev.amdtemp.0.tsi.sensor3.cfg9: 0
 +dev.amdtemp.0.tsi.sensor3.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor3.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor3.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor3.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor3.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor3.revision: 2
 +dev.amdtemp.0.tsi.sensor3.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor4.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor4.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor4.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor4.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor4.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor4.status: 0
 +dev.amdtemp.0.tsi.sensor4.cfg3: 0
 +dev.amdtemp.0.tsi.sensor4.cfg9: 0
 +dev.amdtemp.0.tsi.sensor4.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor4.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor4.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor4.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor4.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor4.revision: 2
 +dev.amdtemp.0.tsi.sensor4.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor5.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor5.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor5.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor5.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor5.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor5.status: 0
 +dev.amdtemp.0.tsi.sensor5.cfg3: 0
 +dev.amdtemp.0.tsi.sensor5.cfg9: 0
 +dev.amdtemp.0.tsi.sensor5.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor5.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor5.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor5.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor5.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor5.revision: 2
 +dev.amdtemp.0.tsi.sensor5.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor6.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor6.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor6.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor6.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor6.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor6.status: 0
 +dev.amdtemp.0.tsi.sensor6.cfg3: 0
 +dev.amdtemp.0.tsi.sensor6.cfg9: 0
 +dev.amdtemp.0.tsi.sensor6.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor6.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor6.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor6.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor6.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor6.revision: 2
 +dev.amdtemp.0.tsi.sensor6.sensor_offset: 0
 +dev.amdtemp.0.tsi.sensor7.cpu_temperature: 56.0C
 +dev.amdtemp.0.tsi.sensor7.high_temperature_threshold: 70.0C
 +dev.amdtemp.0.tsi.sensor7.low_temperature_threshold: 0.0C
 +dev.amdtemp.0.tsi.sensor7.cpu_temperature_offset_hi: 0
 +dev.amdtemp.0.tsi.sensor7.cpu_temperature_offset_lo: 0
 +dev.amdtemp.0.tsi.sensor7.status: 0
 +dev.amdtemp.0.tsi.sensor7.cfg3: 0
 +dev.amdtemp.0.tsi.sensor7.cfg9: 0
 +dev.amdtemp.0.tsi.sensor7.upd_rate: 8
 +dev.amdtemp.0.tsi.sensor7.timeout_cfg: 128
 +dev.amdtemp.0.tsi.sensor7.alert_threshold: 0
 +dev.amdtemp.0.tsi.sensor7.alert_cfg: 0
 +dev.amdtemp.0.tsi.sensor7.manufacture_id: 0
 +dev.amdtemp.0.tsi.sensor7.revision: 2
 +dev.amdtemp.0.tsi.sensor7.sensor_offset: 0</code>
 +
 +
 +
 +{{tag>software freebsd amdtemp deprecated mysoft}}
software/freebsd/amdtemp.txt · Last modified: 2022/02/05 05:25 by root